1. Field of Use
This invention relates to cache units utilized by a processing unit and more particularly to apparatus for improving the performance of a cache unit.
2. Prior Art
In general, the cache unit provides a data processing unit with fast access to data and instructions. To do this, such unit responds to each command received from the data processing unit by fetching the requested block of data or instructions from main store. In such systems, all accessed data and instruction words from main store are written into cache except for the situations when the cache unit is placed in a bypass mode of operation. This normally occurs when the processing unit detects the existence of a fault or error condition. For further information reference may be made to U.S. application titled "Input/Output Cache System Including Bypass Capability" invented by Jaime Calle and Lawrence W. Chelberg, Ser. No. 755,871, filed on Dec. 30, 1976 and assigned to the same assignee as named herein. While it is possible to bypass cache under the circumstances described above, this is done under the direction and control of the data processing unit. It has been found that certain types of instructions which are used to process fields of data within main store could during normal execution cause the replacement of large segments of data words residing in cache. In such cases, this was found to be equivalent to a cache flushing operation. Recognizing that the execution time may become quite long when large data fields are involved, some processing units include apparatus for automatically interrupting such instructions as part of a mid instruction interrupt procedure. While this avoids continuous execution of one instruction, there still is extensive replacement of cache data.
Accordingly, it is a primary object of the present invention to provide an improved cache unit.
It is a further object of the present invention to provide a cache unit which prevents the replacement of data which could result in a decrease in processing efficiency.